Array
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Bulldog
This thesis explores the problem of exploiting the parallelism available in emerging multiprocessor architectures. Ellis contends that high-quality compilers can be written for VLIW (Very Long Instruction Word) computers. These machines drive multiple parallel RISCs (Reduced Instruction Set Computers) with a single instruction stream. Each instruction is long enough to command all of the RISCs at once. Exploiting the parallelism in VLIW machines can be difficult, so Ellis developed a compiler--Bulldog--that incorporates a number of optimizations. It uses trace scheduling to find more parallelism, memory reference and memory bank disambiguation to increase memory bandwidth, and a new code-generation algorithms.